The invention relates generally to a circuit and method for implementing a time slice arbiter. The present invention has specific applicability to real time operating systems (RTOS) where microcontrollers are used for managing and controlling a group of peripheral devices located on a high speed bus.
Typical contemporary computing systems include a number of data and control busses, including in some cases all or some of the following: (a) a host (processor) bus; (b) a memory access bus; (c) a system bus; (d) an expansion bus, etc. This differentiation is necessary and desirable because various components used with such busses have different performance characteristics; thus, for overall system performance it is generally the case that components of equivalent performance/characteristics are grouped on a single xe2x80x9cbus.xe2x80x9d
One bus architecture that is becoming increasingly popular in use is the Universa Serial Bus (USB). This bus has a number of advantageous characteristics, including the following: (1) ease of use for PC peripheral expansion; (2) low cost implementation for transfer rates up to 12 Mbs; (3) full support for real-time data from voice, audio and compressed video sources; (4) protocol flexibility for mixed mode isochronous data transfers and asynchronous messaging; (5) ease of integration in commodity device technology; (6) applicability to many PC configurations and form factors; (7) reliable standard interface capable of quick diffusion into new products; (8) enables new classes of devices that augment PC capability very easily. As with many bus architectures, the USB also typically includes some form of controller for managing data transfers between peripherals coupled on such bus, as well as between such peripherals and components located on other busses. Such peripherals may include, for example, devices that require real time computing performance, such as network adapters, audio players (audio information), camcorders (video information), etc. While it is obviously critical and advantageous to include such high performance peripherals, it is also extremely difficult for contemporary controllers to manage the demands of such peripherals in an efficient manner. This is because the existence of such real time devices in the operating system means that there are likely to be any number of asynchronous events requiring attention at any moment in time, and this can lead to a number of complex interrupt conflicts that are challenging to resolve using (what are typically) inexpensive hardware/software solutions implemented in microcontroller form. In addition, with fixed or round-robin type priority schemes, the latencies involved cannot be satisfactorily resolved for a real time device.
Accordingly, there is a growing need for a high performance, cost-effective controller solution for managing the demands placed by event intensive bus architectures such as found in the USB and similar RTOS environments.
An object of the present invention, therefore, is to provide a circuit and method for managing complex electronic components coupled on a high speed, high performance bus;
Yet a further object of the present invention is to provide a mechanism for permitting a microcontroller to divide its processing time into distinct time slices, which time slices can be dynamically apportioned as needed to effectuate functions carried out by devices managed by such microcontroller;
Another object of the present invention is to provide an circuit and method for generating time slice interrupts to a microcontroller to permit the latter to utilize a time slice architecture for carrying out processing tasks executed by such microcontroller.
A first aspect of the present invention, therefore, is a programmable timer for coordinating management of interrupt routines in conjunction with an interrupt handler. The handler is associated with a bus controller circuit and executes one or more code routines during one or more respective time slice periods. The timer further comprises: means for storing a first value identifying a time slice period; and means for storing a second value corresponding to a length of the time slice period; and means for generating an interrupt signal to the interrupt handler for causing such handler to execute the one or more code routines. In this manner, the first and second values are provided by the interrupt handler based on timing characteristics of the code routines.
In a preferred embodiment, the bus controller circuit is interfaced to a Universal Serial Bus, and the interrupt handler is executed by a microcontroller. Each of the code routines are firmware routines associated with devices coupled through a bus to the bus controller circuit. The first value for the time slice period is stored in a time slice control and status register, while the second value for the length of the time slice is stored in a time slice counter register. A counter which is operated at a frequency corresponding to the system clock, generates the interrupt signal when a period of time equal to the stored time slice period has expired.
A second aspect of the present invention relates to a method of operating a microcontroller to handle a main routine as well as code routines associated with one or more devices coupled to such microcontroller through a bus such as the USB. The code routines are caused to run during their own respective distinct time slice periods. The method then includes the following steps: (a) interrupting the microcontroller to execute one of such code routines; (b) identifying a time slice to be used by the microcontroller for such code routine; and (c) determining a time length associated with such identified time slice; and (d) executing the code routine during such time length; and (e) returning control to the main routine when such code routine is finished. It can be seen that steps (a) through (e) are repeated as necessary to handle microcontroller operations associated with such devices.
In the preferred method of this aspect of the present invention, an additional step is also executed between steps (a) and (b) of disabling other microcontroller interrupts; a corresponding step between steps (c) and (d) re-enables the other microcontroller interrupts. After step (c), another operation is performed of loading the time length into a counter, which counter generates an interrupt signal when such time length expires. An initial step of associating each of the code routines with one (or more if necessary) of the time slice periods is also performed. An advantage of the present invention is that the identity of the time slice (as well as its length) to be used by the microcontroller for any code routine can be dynamically changed as needed to cope with changing system configurations, operating conditions, etc.
A third aspect of the present invention includes a method for setting up a schedule of time slices associated with a plurality of code routines to be executed by a controller circuit. The method generally includes the steps of: (a) determining a total processor time quantity available to such processing circuit for executing such code routines; (b) determining a total code routine time quantity necessary to execute such code routines; (c) setting up a schedule of time slices, such schedule corresponding to one or more time slice periods to be used by the processing circuit for executing such code routines, such time slice periods corresponding to a time slice number and an associated time slice duration. In this fashion, a sequence of code routines can be executed by the controller circuit during the schedule of time slices. The time slice duration is based on operating characteristics of the device coupled by a bus to the controller circuit, and can be dynamically changed. The code routines are ordered in a time sequence corresponding to a relative handling priority associated with such routines. Again, in preferred embodiment, execution of one of the plurality of such code routines can take place during more than one of such time slice periods, and the particular time slice to be used for any code routine can be dynamically changed.
Although the inventions are described below in a preferred embodiment incorporated within a Universal Serial Bus (USB) environment, it will be apparent to those skilled in the art the present invention would be beneficially used in connection with any microcontroller used for managing real time peripherals on a high speed bus.